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Inside the 6502: How 3,510 Transistors Became a Computer

The film's page has its chapters, every source, the code and the full transcript: Inside the 6502: How 3,510 Transistors Became a Computer.

Sources and credits for the film. Every fact in the narration is tied to a quotation from a captured source; every image, clip and piece of music is listed with its licence and where it came from. Archive images and footage are public domain, openly licensed or used for commentary, criticism and historical analysis. Maps, charts and diagrams were made for this film from the cited sources.

Images and footage (85)

  • MOS Technology's two-page introductory advertisement in IEEE Computer, September 1975 (pp. 38-39): 'MOS 6502 the second of a low cost high performance microprocessor family', 'MCS6501-MCS6505 a great microprocessor family', a feature list, and on the right page 'MOS 6502 SAVES MORE MONEY ... Eliminates $10-$50 Clock Drivers ... Last Month We Introduced The MCS6501 For $20 ... This Month We Added The MCS 6502 For $25', with the WESCON booth (San Francisco, 16-19 September 1975). 2,403 x 1,650.
    MOS Technology advertisement, IEEE Computer, September 1975 (scan: Michael Holley, Wikimedia Commons). Public domain. Source
  • Motorola's full-page advertisement in Electronics, 30 October 1975, page 11: 'All this...' over a pile of M6800 development hardware, manuals and tapes (an EXORciser among them) on giant white letters 'M6800', with ceramic M6800-family chips in front; then 'and the unbundled $69 microprocessor', an MC6800 with a '$69' tag, body text ('The MC6800, $69.00 each for any quantity under 100...'), the table 'New Low M6800 Family Prices' (MC6800 now $69.00, was $175.00 for 1-9), 'New board enhances $149.00 design kit bargain', and the MOTOROLA M6800 'Benchmark family for microcomputer systems.' sign-off; footer 'Electronics/October 30, 1975' and '11'. Michael Holley's scan, 1,238 x 1,650.
    Motorola advertisement, Electronics, 30 October 1975 (scan: Michael Holley, Wikimedia Commons). Public domain. Source
  • An Apple II computer with a monitor on top and two Disk II drives, on a black background, on display at the Musee Bolo, EPFL Lausanne (photographed August 2010).
    Photo: Rama and Musee Bolo, CC BY-SA 2.0 FR, via Wikimedia Commons. CC BY-SA 2.0 fr. Source
  • Printed page 62 (PDF page 74) of Apple's Apple II Reference Manual (A2L0001A, copyright 1979, 1981): the Monitor's subroutine list from PRBLNK ($F948) to GETLNZ ($FD67), including '$FD1B KEYIN Read the Apple's keyboard: This is the keyboard input subroutine. It reads the Apple's keyboard, waits for a keypress, and randomizes the random number seed (see page 32). When it gets a keypress, it removes the flashing cursor and returns with the keycode in the accumulator.' A water stain blots the upper right of the page (around PRBL2 and BELL); the KEYIN entry, in the lower half, is clean. Binding holes along the right edge. 1,233 x 1,827.
    Apple II Reference Manual, Apple Computer Inc., 1979, 1981, p. 62; scan: Internet Archive. Fair-use candidate (Apple II Reference Manual, A2L0001A, copyright 1979, 1981 Apple Computer Inc.). Source
  • BYTE, November 1975, printed page 57 (PDF page 59 of the Internet Archive scan), from Daniel Fylstra's review 'Son of Motorola (or, the $20 CPU Chip)': four columns under the heading 'Ready or not, here I come: 6800 to 6501.', Table I (instructions functionally equivalent on the Motorola 6800 and the MCS6501) and a pull quote on the 'age of the affordable computer'. In the first column, lower half: 'But for $25 you can have the MCS6502, which includes an on-the-chip clock, driven by an external single phase clock or an RC or crystal time base input.' Clean black-on-white scan, 1,737 x 2,333.
    BYTE, November 1975, p. 57 (Daniel Fylstra, 'Son of Motorola'); scan: Internet Archive. Fair-use candidate (BYTE, November 1975; copyright Green Publishing / BYTE Publications). Source
  • BYTE, November 1975, printed page 61 (PDF page 63 of the Internet Archive scan), from Fylstra's 'Son of Motorola': upper left, Table III (the Motorola 6800's instructions, addressing modes and execution times); upper right, the pull quote 'Which processor comes out ahead overall?...'; in the right-hand column, 'The greatest failing of the 6500 series design is the inconsistent availability of the addressing modes from instruction to instruction.'; lower right, Table IV, the MCS6501's instructions against its addressing modes, with gaps where a mode is missing for an instruction. Clean scan, 1,739 x 2,333.
    BYTE, November 1975, p. 61 (Daniel Fylstra, 'Son of Motorola'); scan: Internet Archive. Fair-use candidate (BYTE, November 1975; copyright Green Publishing / BYTE Publications). Source
  • A Commodore 64 main board in the lower half of its case, from above: silkscreen '(c)1983 COMMODORE INTL COMMODORE 64 ASSY NO.250407 ARTWORK NO.251137 REV.B'; the CPU is a MOS 6510 CBM, date code 2583 (week 25 of 1983); two MOS 6526 CIAs (2383), the 6581 SID, the VIC-II under its perforated shield, the RF modulator box top right. The source names the board a C64 mainboard, assembly ASSY250407 Rev B.
    Photo: Sven Petersen, CC BY-SA 4.0, via Wikimedia Commons. CC BY-SA 4.0. Source
  • A breadbin Commodore 64 (1982) seen from the front left on white.
    Photo: Evan-Amos, public domain, via Wikimedia Commons. Source
  • A 92-second 4K handheld video by Maximilian Schonherr (2024): the camera glides round a breadbin Commodore 64 lying on a polished wooden floor: the keyboard, the 'commodore 64' badge, the red power light, the side and back ports; a dark frame at the end. Shots recorded: c64-glide-wide, c64-glide-keyboard-badge, c64-power-led, c64-glide-ports.
    Video: Maximilian Schonherr, CC BY-SA 4.0, via Wikimedia Commons. CC BY-SA 4.0. Source
  • Die photograph of a MOS Technology 6502 described by its photographer as revision A (the first, 1975-76 generation, before the June 1976 ROR change); the die's own legend, left of centre, reads '6502A', with a second legend block below it; whole die in the usual orientation (decoder grid across the top, datapath below), bond wires still attached, 2,696 x 2,998 px; no package or date code shown. Photographed by Pauli Rautakorpi, 2016.
    MOS 6502 die (revision A): Pauli Rautakorpi, CC BY 3.0, via Wikimedia Commons. CC BY 3.0. Source
  • A detail of die-6502d-mcmaster-full, its pixels 5952,0 to 10848,9883 (4896 × 9883 of 10848 × 9883) at 4156 × 2060, turned a quarter anticlockwise: Die photograph of a MOS Technology 6502, die revision D (the die's own legend reads '6502-D', beside mask-layer codes), whole die, top metal, Mitutoyo 20x, full-resolution original 10,848 x 9,883 px (about 0.4 um a pixel). The photo is turned a quarter: the instruction decoder's grid runs down the right-hand side, the random logic in the middle, the eight bit-slice datapath columns on the left, bond pads round the edge, the MOS logo at the bottom right. The chip is McMaster's MOS MPS 6502 A (2 MHz grade), date code 5281, week 52 of 1981 (pack-6502d-mcmaster-top). Photographed by John McMaster, 2018. A 1981 rev D part: never for 1975.
    MOS 6502D die: John McMaster (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • A detail of die-6502d-mcmaster-full, its pixels 7461,1978 to 10490,7363 (3029 × 5385 of 10848 × 9883) at 5385 × 3030, turned a quarter anticlockwise: Die photograph of a MOS Technology 6502, die revision D (the die's own legend reads '6502-D', beside mask-layer codes), whole die, top metal, Mitutoyo 20x, full-resolution original 10,848 x 9,883 px (about 0.4 um a pixel). The photo is turned a quarter: the instruction decoder's grid runs down the right-hand side, the random logic in the middle, the eight bit-slice datapath columns on the left, bond pads round the edge, the MOS logo at the bottom right. The chip is McMaster's MOS MPS 6502 A (2 MHz grade), date code 5281, week 52 of 1981 (pack-6502d-mcmaster-top). Photographed by John McMaster, 2018. A 1981 rev D part: never for 1975.
    MOS 6502D die: John McMaster (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • A detail of die-6502d-mcmaster-full, the whole photograph at 1967 × 2160, turned a quarter anticlockwise: Die photograph of a MOS Technology 6502, die revision D (the die's own legend reads '6502-D', beside mask-layer codes), whole die, top metal, Mitutoyo 20x, full-resolution original 10,848 x 9,883 px (about 0.4 um a pixel). The photo is turned a quarter: the instruction decoder's grid runs down the right-hand side, the random logic in the middle, the eight bit-slice datapath columns on the left, bond pads round the edge, the MOS logo at the bottom right. The chip is McMaster's MOS MPS 6502 A (2 MHz grade), date code 5281, week 52 of 1981 (pack-6502d-mcmaster-top). Photographed by John McMaster, 2018. A 1981 rev D part: never for 1975.
    MOS 6502D die: John McMaster (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • Die photograph of a MOS Technology 6502, die revision D ('6502-D' on the die), whole die, top metal, Mitutoyo 20x; Commons' 3,840 px wide rendition of the 10,848 x 9,883 original (die-6502d-mcmaster-full). Turned a quarter: decoder grid down the right, datapath columns on the left, MOS logo bottom right. From McMaster's MOS MPS 6502 A, date code 5281 (week 52 of 1981). Photographed by John McMaster, 2018. The source's file name 'mz mit20x' names the photographer's set-up (a Mitutoyo 20x objective), not the chip.
    MOS 6502D die: John McMaster (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • Die photograph of a MOS Technology 6502, die revision D (the die's own legend reads '6502-D', beside mask-layer codes), whole die, top metal, Mitutoyo 20x, full-resolution original 10,848 x 9,883 px (about 0.4 um a pixel). The photo is turned a quarter: the instruction decoder's grid runs down the right-hand side, the random logic in the middle, the eight bit-slice datapath columns on the left, bond pads round the edge, the MOS logo at the bottom right. The chip is McMaster's MOS MPS 6502 A (2 MHz grade), date code 5281, week 52 of 1981 (pack-6502d-mcmaster-top). Photographed by John McMaster, 2018. A 1981 rev D part: never for 1975. The source's file name 'mz mit20x' names the photographer's set-up (a Mitutoyo 20x objective), not the chip.
    MOS 6502D die: John McMaster (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • Die photograph of a second MOS Technology 6502 revision D ('6502-D'), whole die, top metal, Mitutoyo 20x (Commons 3,840 px rendition of the 10,874 x 9,910 original). Its plastic package reads MOS / 6502 with a worn date code ending '83' (1983) and HONG KONG HM264722 underneath. Photographed by John McMaster, 2018. The source's file name 'mit20x' names the photographer's set-up (a Mitutoyo 20x objective), not the chip.
    MOS 6502D die (second specimen): John McMaster (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • Die photograph of the Ricoh RP2A03 (the NES's 6502-based CPU), whole die, top metal, Mitutoyo 20x; Commons' 3,840 px rendition of the 14,758 x 14,740 original (die-rp2a03-digshadow-full). The die's own marking RP2A03 is legible right of centre. Photographed by Digshadow, 2015 (Commons: Author Digshadow, Date 2015, description 'Dishot vom rp2a03'). The source's file name 'mcmaster mz mit20x' is the name of the siliconpr0n map it was taken from (its Source: siliconpr0n.org/map/nintendo/rp2a03/mcmaster_mz_mit20x/); 'mit20x' names the photographer's set-up (a Mitutoyo 20x objective), not the chip.
    Ricoh RP2A03 die: Digshadow (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • Die photograph of the Ricoh RP2A03, the NES's CPU (a 6502 core without decimal mode, plus the sound and DMA logic), whole die, top metal, 20x, full-resolution original 14,758 x 14,740 px. Package marked RP2A03 4B220 (pack-rp2a03-mcmaster-top); revision letter not stated. Photographed by Digshadow, 2015. The source's file name 'mit20x' names the photographer's set-up (a Mitutoyo 20x objective), not the chip.
    Ricoh RP2A03 die: Digshadow (siliconpr0n.org), CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • Page 7 of the August 1975 MOS data sheet: the PROGRAMMING MODEL (accumulator A, index registers Y and X, program counter PCH/PCL, stack pointer S, processor status register P with its flag bits) and the table 'INSTRUCTION SET - OP CODES, Execution Time, Memory Requirements'. The data sheet covers the whole MCS6501-MCS6505 family; this page's programming model and instruction set are common to all of them.
    MOS Technology, MCS6501-MCS6505 Preliminary Data Sheet, August 1975 (scan via 6502.org). Public domain (US): published August 1975 without a copyright notice. Source
  • Page 9 of the August 1975 MOS data sheet: 'MCS6502 - 40 Pin Package': the text 'The MCS6502 combines the MC6800 bus compatibility features of the MCS6501 with an on-the-chip clock oscillator and driver which eliminates the requirement for a two phase 5 volt clock input ... the MCS6502 has a SYNC line output which signals each time an OP CODE fetch is being performed', the MCS6502 pinout designations (Vss, RDY, phi1 out, IRQ, NMI, SYNC, Vcc, A0-A15, D0-D7, R/W, phi0 in, phi2 out, S.O., RES) and the Features of MCS6502 box. The data sheet covers the whole MCS6501-MCS6505 family; this page is the MCS6502's own pinout.
    MOS Technology, MCS6501-MCS6505 Preliminary Data Sheet, August 1975 (scan via 6502.org). Public domain (US): published August 1975 without a copyright notice. Source
  • Page 7 of MOS Technology's MCS6500 Preliminary Data Sheet, May 1976: 1 MHz and 2 MHz timing; in each, 'CLOCK TIMING - MCS6502, 03, 04, 05, 06' with the Cycle Time row (T CYC) giving a minimum (1000 ns; 500 ns) and nothing under MAX., above the read/write timing tables
    MOS Technology, MCS6500 Preliminary Data Sheet, May 1976 (scan: Internet Archive). http://creativecommons.org/publicdomain/zero/1.0/. Source
  • EDN, 20 September 1975, page 40, 'One step at a time saves...': 'when single stepping, the machine would not stop on a write cycle, but would race through at regular speed to stop on the next read cycle. This is normal behavior with the 6502 and is described in the data sheets.' (Fig. 4, the die photograph, below)
    EDN, 20 September 1975 (Robert H. Cushman); scan: Michael Holley, swtpc.com. Fair-dealing candidate (EDN, 20 September 1975; copyright Cahners Publishing / the die photo probably MOS Technology's). Source
  • EDN, 20 September 1975, page 41: 'The most visually obvious space saving was at the address output buffers. Eliminating these 3-state devices allowed MOS Technology to shrink the buffer size considerably.' and, under 'Room for growth', 'MOS Technology has left holes in the 650X instruction bit pattern to accommodate a " quasi-16-bit machine.\'
    EDN, 20 September 1975 (Robert H. Cushman); scan: Michael Holley, swtpc.com. Fair-dealing candidate (EDN, 20 September 1975; copyright Cahners Publishing / the die photo probably MOS Technology's). Source
  • The front-page clipping of Electronic Engineering Times, Monday, August 25, 1975 ('059 Circulation over 80,000 The Engineering Newspaper for the Electronics Industry'): a colour photograph of nine MOS Technology designers, eight standing behind a table and one seated, two of them holding a large curling print of the CPU Rubylith; the wall behind them is covered by the 1000X enlargement of the decode ROM (a dense pattern of dots and lines). Caption: 'MOS Technology MCS650X microprocessor designers gather around a 200X print of the CPU Rubylith, color-coded for debugging into metallization, polysilicon and diffusion layers. In the background is a 1000X expansion of the Internal 21X143 decode-ROM, which manager Chuck Peddle claims is a key factor in obtaining small chip size. From left to right are layout designers Sydney-Anne Holt, Michael Jaynes, Harry Bawcom, design engineers Chuck Peddle, Ray Hirt, Rodney Orgill, William Mensch and Wilbur Mathys. Seated is product manager Terry Holdt. See page 24.' The clipping fills the left of the page; the right half is blank. Yellowed newsprint halftone, soft. 3,450 x 1,614.
    Electronic Engineering Times, 25 August 1975; scan provided by William D. Mensch Jr. via commodore.ca. Fair-use candidate (Electronic Engineering Times, 25 August 1975, front page and p. 24; copyright CMP / EE Times). Source
  • The same 6.5 s of Pitfall! (Activision, 1982) as emu-a2600-pitfall-clock, cropped to the top-left corner of the jungle: the score above, the two bars (spare lives) and the clock below, white digits on the dark green canopy, no sound. 2000 and 20:00 until 2.40 s, when the clock reads 19:59; the score reads 1900 from 3.32 s; the clock reads 19:58 at 3.40 s, 19:57 at 4.41 s, 19:56 at 5.41 s, 19:55 at 6.41 s.
    Pitfall! (David Crane, Activision, 1982). Fair dealing (criticism, review, quotation): Pitfall! (David Crane, Activision, 1982); recorded by Retro Computer TV.
  • Pitfall! (Activision, 1982, David Crane), the original cartridge (AX-018) on an NTSC Atari 2600, the whole picture at 4:3, 6.0 s, no sound: the first screen, score 1900, clock 19:55. Pitfall Harry, in the tunnel beside the brick wall, runs left to the ladder (1.49 s) and climbs it (rung by rung from 1.57 s, at the top at 2.77 s), steps off to the left onto the jungle floor (3.17 s, lands 3.72 s) and walks left, stopping at 4.92 s; the clock reads 19:54 at 0.90 s, 19:53 at 1.90 s, 19:52 at 2.90 s, 19:51 at 3.90 s, 19:50 at 4.91 s, 19:49 at 5.91 s. The black tunnel (lines 160-190 of the 228-line picture, y 758-905 of the 1080-line clip) is drawn by two loops of exactly 76 cycles a pass, its upper 15 lines (y 758-829) by the loop at $F4DB, its lower 16 (y 829-905) by the loop at $F508; Harry is in those lines until 2.50 s.
    Pitfall! (David Crane, Activision, 1982). Fair dealing (criticism, review, quotation): Pitfall! (David Crane, Activision, 1982); recorded by Retro Computer TV.
  • Pitfall!'s tunnel
    Pitfall! (David Crane, Activision, 1982). Fair dealing (criticism, review, quotation): Pitfall! (David Crane, Activision, 1982); recorded by Retro Computer TV.
  • The Apple-1 Monitor dumping its own first bytes: FF00: D8 (CLD) 58 A0 7F ...
    the Apple-1 Woz Monitor (Steve Wozniak, Apple Computer Company, 1976; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple-1 Woz Monitor (Steve Wozniak, Apple Computer Company, 1976; Apple Inc.); recorded by Retro Computer TV.
  • An original Apple II (white 40-column text on black, rows 1-14) with a program assembled at $0400 by the Mini-Assembler: 0400- 18 CLC, 0401- A9 42 LDA #$42, 0403- 69 3F ADC #$3F, 0405- 00 BRK. From 16.0 s: $400G typed, RETURN at 17.5 s; the program runs and the Monitor prints 0407- A=81 X=00 Y=FF P=F0 S=F5: A holds $81 and the pushed status byte $F0 has N (bit 7) and V (bit 6) set, C clear. Before 16.0 s: power-on and the program typed; never shown. Silent. 22 s.
    the Apple II Monitor and Mini-Assembler ROM (Apple Computer, 1977; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple II Monitor and Mini-Assembler ROM (Apple Computer, 1977; Apple Inc.); recorded by Retro Computer TV.
  • An Apple II Plus powering on: a few frames of the power-on screen memory (MAME's pattern of inverse characters; a real machine shows its own random one), then the APPLE ][ banner and Applesoft's ] prompt with the flashing cursor; the start-up beep. 5 s.
    the Apple II Plus Autostart ROM (Apple Computer, 1978; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple II Plus Autostart ROM (Apple Computer, 1978; Apple Inc.); recorded by Retro Computer TV.
  • An Apple II Plus screen, 40-column white text on black: the APPLE ][ banner and Applesoft's ] prompt, then typed at the Monitor CALL -151, *300:00 and *300G; the Monitor's break dump appears, '0302- A=FF X=00 Y=FF P=30 S=F0', and the * prompt. 14 s, the whole 4:3 frame, no emulator interface.
    the Apple II Plus Autostart ROM Monitor and Applesoft (Apple Computer, 1978; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple II Plus Autostart ROM Monitor and Applesoft (Apple Computer, 1978; Apple Inc.); recorded by Retro Computer TV.
  • An original Apple II running Dragon Maze by Gary J. Shannon, typed in from Apple's January 1978 Reference Manual, white 40-column text and lo-res graphics on black: the program's instructions with its prompt TYPE 'GO' TO BEGIN (0-5 s, the cursor flashing); G (5.07 s), O (5.17 s) and RETURN (5.42 s); a burst of coloured blocks as the graphics screen switches on and is wiped right to left (5.43-5.58 s); a white grid of 13 x 13 cells, complete by 5.75 s, with DRAGON MAZE and GARY J. SHANNON below; the maze carved into it in black, passage by passage, at real speed from 6.88 s to 54.02 s; the complete maze (54.02-54.18 s) with a short buzz (54.06-54.22 s); THE MAZE IS READY (54.18 s); the maze wiped right to left (54.20-54.37 s) and the game's start screen, a white border with the player's square at the left and a gap for the door at the right (from 54.42 s, held to 57.7 s). The whole 4:3 frame, 1440 x 1080, 60 fps, the machine's sound; no emulator interface.
    Dragon Maze (Gary J. Shannon; Apple II Reference Manual, Apple Computer, 1978). Fair dealing (criticism, review, quotation): Dragon Maze (Gary J. Shannon; Apple II Reference Manual, Apple Computer, 1978); recorded by Retro Computer TV.
  • Two finished Dragon Maze screens side by side on a dark navy background, each the whole 4:3 Apple II frame (white walls, black passages, DRAGON MAZE and GARY J. SHANNON below): left, the maze built after RETURN was pressed 5.42 s after the program's prompt appeared (KEYIN's count caught at $88C5); right, the same program after RETURN 0.40 s later (count $F318): a completely different maze. Both frames held for 8 s; no labels, silent.
    Dragon Maze (Gary J. Shannon; Apple II Reference Manual, Apple Computer, 1978). Fair dealing (criticism, review, quotation): Dragon Maze (Gary J. Shannon; Apple II Reference Manual, Apple Computer, 1978); recorded by Retro Computer TV.
  • The same recording as emu-apple2-dragon-maze (an original Apple II running Dragon Maze by Gary J. Shannon, the program's own screen and sound, timings unchanged: the prompt 0-5 s, GO and RETURN 5.07-5.42 s, the white 13 x 13 grid complete by 5.75 s, the maze carved from 6.88 s to 54.02 s, THE MAZE IS READY at 54.18 s), the 4:3 picture at three quarters size centred on black.
    Dragon Maze (Gary J. Shannon; Apple II Reference Manual, Apple Computer, 1978). Fair dealing (criticism, review, quotation): Dragon Maze (Gary J. Shannon; Apple II Reference Manual, Apple Computer, 1978); recorded by Retro Computer TV.
  • An Apple II Plus screen (white 40-column text on black, the top 14 rows, large) with a three-line Applesoft program: 10 GET K$ / 20 PRINT K$;" ";PEEK(78)+256*PEEK(79) / 30 GOTO 10. From 12.0 s: RUN typed (12.6-13.0 s), RETURN at 13.3 s; the flashing cursor while it waits; the A key pressed at 17.95, 19.35, 20.95, 21.85, 22.95 and 23.75 s, each printing A and the count KEYIN had reached: 15726, 43970, 20326, 14561, 22433, 9864. Before 12.0 s: power-on, HOME and the program typed; never shown. Silent. 28 s.
    Applesoft BASIC and the Apple II Plus Autostart ROM Monitor (Microsoft and Apple Computer, 1978; Apple Inc.). Fair dealing (criticism, review, quotation): Applesoft BASIC and the Apple II Plus Autostart ROM Monitor (Microsoft and Apple Computer, 1978; Apple Inc.); recorded by Retro Computer TV.
  • A frame of emu-apple2-keyin-count at 27.0 s: the program, RUN and the six key presses with their counts (A 15726 ... A 9864), the machine waiting again.
    Applesoft BASIC and the Apple II Plus Autostart ROM Monitor (Microsoft and Apple Computer, 1978; Apple Inc.). Fair dealing (criticism, review, quotation): Applesoft BASIC and the Apple II Plus Autostart ROM Monitor (Microsoft and Apple Computer, 1978; Apple Inc.); recorded by Retro Computer TV.
  • An original Apple II's Monitor at its * prompt (white 40-column text on black, the top 19 rows). From 13.0 s: 300L typed, RETURN at 14.4 s, and the Monitor's own disassembler lists the sixteen bytes stored at $0300 one per line: the eight documented LDA forms (A1 LDA ($00,X), A5 LDA $00, A9 LDA #$00, AD LDA $0000, B1 LDA ($00),Y, B5 LDA $00,X, B9 LDA $0000,Y, BD LDA $0000,X) alternating with the eight MOS left undocumented (A3, A7, AB, AF, B3, B7, BB, BF), each listed as ???. Before 13.0 s: power-on and the bytes typed; never shown. Silent. 20 s.
    the Apple II Monitor ROM (Apple Computer, 1977; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple II Monitor ROM (Apple Computer, 1977; Apple Inc.); recorded by Retro Computer TV.
  • An original Apple II at the Mini-Assembler's ! prompt (white 40-column text on black, the top 14 rows, large). From 4.0 s: 300:LDA #$42 typed (L, D, A at 6.9-7.55 s, 42 at 11.4-11.6 s), RETURN at 13.6 s, and the machine replaces the line with 0300- A9 42 LDA #$42, the two bytes it stored. From 22 s the BRK line is added (0302- 00 BRK). From 24.0 s: $300G typed (24.6-25.4 s), RETURN at 25.7 s; the program runs and the Monitor prints 0304- A=42 X=00 Y=FF P=30 S=F5 and its * prompt. Before 4.0 s: power-on and the pre-roll (F666G, $FC58G clearing MAME's power-on screen); never shown. Silent. 30 s.
    the Apple II Monitor and Mini-Assembler ROM (Apple Computer, 1977; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple II Monitor and Mini-Assembler ROM (Apple Computer, 1977; Apple Inc.); recorded by Retro Computer TV.
  • An Apple II Plus screen: after CALL -151, the Monitor's own disassembler lists FA40L, 20 lines: FA40- 85 45 STA $45, FA42- 68 PLA, FA43- 48 PHA, FA44, FA45, FA46- 0A ASL, FA47- 30 03 BMI $FA4C, FA49- 6C FE 03 JMP ($03FE), FA4C- 28 PLP, FA4D- 20 4C FF JSR $FF4C ... FA5F- 4C 65 FF JMP $FF65, FA62- D8 CLD, FA63- 20 84 FE JSR $FE84. White on black, 12 s.
    the Apple II Plus Autostart ROM Monitor (Apple Computer, 1978; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple II Plus Autostart ROM Monitor (Apple Computer, 1978; Apple Inc.); recorded by Retro Computer TV.
  • The Apple II Plus Monitor listing its own IRQ/BRK handler from FA40 (three ASL at FA44-FA46) to the reset routine's FA62 CLD
    the Apple II Plus Autostart ROM Monitor (Apple Computer, 1978; Apple Inc.). Fair dealing (criticism, review, quotation): the Apple II Plus Autostart ROM Monitor (Apple Computer, 1978; Apple Inc.); recorded by Retro Computer TV.
  • An original Apple II's Monitor, white 40-column text on black, with the machine's sound: *300L typed (0.87-1.17 s) and the Monitor's listing of our five-instruction loop (complete at 1.47 s): 0300- AD 30 C0 LDA $C030 / 0303- A2 64 LDX #$64 / 0305- CA DEX / 0306- D0 FD BNE $0305 / 0308- 4C 00 03 JMP $0300, then 15 lines of empty memory; *300G (3.67-3.97 s) and a steady 1,006 Hz tone from 4.24 s to 7.92 s; RESET: a short beep (8.14-8.26 s) and the * prompt; the screen cleared (9.85 s), *CF8L and the same loop listed at $0CF8 (complete at 11.18 s), the same bytes and instructions but for the addresses (0CFE- D0 FD BNE $0CFD, 0D00- 4C F8 0C JMP $0CF8); *CF8G (13.38-13.68 s) and a lower 842 Hz tone from 13.95 s to 17.63 s; RESET, a beep (17.86-17.98 s), held to 19.3 s. The whole 4:3 frame, 1440 x 1080, 60 fps; no emulator interface.
    Retro Computer TV. Own work.
  • A Commodore 64, an Atari 800 and a BBC Micro starting side by side, each from power-on to its first screen, with their own start-up sounds
    the start-up screens of the Commodore 64 KERNAL and BASIC (Commodore, 1982), the Atari 400/800 OS (Atari, 1979) and the BBC Micro MOS (Acorn, 1981). Fair dealing (criticism, review, quotation): the start-up screens of the Commodore 64 KERNAL and BASIC (Commodore, 1982), the Atari 400/800 OS (Atari, 1979) and the BBC Micro MOS (Acorn, 1981); recorded by Retro Computer TV.
  • The legible version of emu-c64-basic-dispatch, cropped to the text: READY., PRINT "HELLO", HELLO, READY.
    Commodore 64 BASIC V2 (Commodore Business Machines, 1982; Microsoft's 6502 BASIC). Fair dealing (criticism, review, quotation): Commodore 64 BASIC V2 (Commodore Business Machines, 1982; Microsoft's 6502 BASIC); recorded by Retro Computer TV.
  • A Commodore 64 (PAL) powering on: about 2 s of black, then the light-blue border and blue screen with '**** COMMODORE 64 BASIC V2 ****', '64K RAM SYSTEM 38911 BASIC BYTES FREE', 'READY.' and the flashing cursor. 7 s.
    the Commodore 64 KERNAL and BASIC V2 (Commodore, 1982). Fair dealing (criticism, review, quotation): the Commodore 64 KERNAL and BASIC V2 (Commodore, 1982); recorded by Retro Computer TV.
  • The C64 screen: READY., SYS 49152, STACKED P = $30, READY.
    Commodore 64 KERNAL (Commodore Business Machines, 1982). Fair dealing (criticism, review, quotation): Commodore 64 KERNAL (Commodore Business Machines, 1982); recorded by Retro Computer TV.
  • The legible version of emu-c64-decimal-flag-print, the same frames: the C64's 40 x 25 text window with 8 lines of border above and below, filling a 1920 x 1080 frame. PRINT 2+2 gives 4 (1.1 s); POKE 49300,96:POKE 783,8:SYS 49300 (5.7 s) leaves the decimal flag set; PRINT 2+2 gives ?SYNTAX ERROR (7.4 s), so does LIST (10.0 s); RUN/STOP-RESTORE (12.7 s): the screen comes back only partly cleared and PRINT 2+2 still gives ?SYNTAX ERROR, printed 16 columns in on row 10 (15.7 s); reset (18.0 s), start-up screen (20.2 s), PRINT 2+2 gives 4 (21.3 s).
    Retro Computer TV. Own work.
  • The first 9.6 s of emu-c64-decimal-flag-print-big (the C64's text window filling the frame, frames unchanged): PRINT 2+2 gives 4 (1.1 s); POKE 49300,96:POKE 783,8:SYS 49300 typed (3.6-5.7 s) leaves the decimal flag set; PRINT 2+2 gives ?SYNTAX ERROR (7.4 s), READY. and the cursor to the end.
    Retro Computer TV. Own work.
  • The Commodore 64 with its decimal flag left on: PRINT 2+2 answered with ?SYNTAX ERROR
    Retro Computer TV. Own work.
  • A Commodore 64 (PAL), our program in double-size C64 characters, light blue on blue: a state line, 'CLI', then 'SEI', then 'CLI'; below it three hexadecimal counters, MAIN, IRQ and NMI, rising together once a frame; while SEI shows, IRQ stops at 0096 as MAIN and NMI run on; after CLI it counts again, now 150 behind. 15 s (the first 3.3 s are the start-up screen and RUN).
    Retro Computer TV. Own work.
  • A Commodore 64 (PAL), our program in double-size C64 characters, light blue on blue, the layout of emu-c64-irq-mask: a state line CLI over three hexadecimal counters MAIN, IRQ and NMI rising together once a frame (0019/0018/0018 at the start); at 3.49 s the state line reads JAM and all three counters stop (00C8, 00C7, 00C7); the picture stays as it is to 6.46 s. At 6.48 s the machine is reset: one torn frame (VICE restarting its video chip mid-picture), then the old picture shifted 7 pixels right with a few specks while the KERNAL tests memory (6.50-8.62 s); at 8.64 s the start-up screen, READY. and the cursor, to 11.25 s.
    Retro Computer TV. Own work.
  • A Commodore 64 (PAL), our program in double-size C64 characters, light blue on blue: JMP (02FF), then 0200 = 6C, 02FF = 34, 0300 = 03; at 1.82 s the line ARRIVED AT 6C34 appears at the bottom, held to 6.6 s.
    Retro Computer TV. Own work.
  • A Commodore 64 (PAL), our program in double-size C64 characters, light blue on blue: AF 00 C0; C000 = 42; A = 00 X = 00, which at 1.42 s becomes A = 42 X = 42, held to 5.2 s.
    Retro Computer TV. Own work.
  • Two Commodore 64 screens side by side, all blue, each with a white bar 48 pixels wide drawn down it one raster line a frame (0-2.2 s): on the left the bar is straight from top to bottom; on the right it is straight for its first 80 lines and then, from the line where the program's indexed load starts crossing a page (1.44 s), moves 8 pixels (one cycle) to the right on every line, so it bends into a shallow diagonal to the right edge. Still from 2.2 s to 9.6 s. No text on screen.
    Retro Computer TV. Own work.
  • Two Commodore 64 screens side by side, white text on blue. Left, titled DEC $D019: a light-blue box in the middle of the screen with a steady light-red band across it (raster lines 133-172) and MAIN counting up once a frame (0008 to 01FB). Right, titled FINAL VALUE ONLY with the line LDA $D019 : SEC : SBC #1 : STA $D019: the same box filled with thin light-red and light-blue stripes that change every frame, and MAIN stuck at 0001. 10 s, no other motion. The right box flickers at the frame rate (50 changes a second, about 94% of its pixels each frame) over 4.3% of the frame; colours #8178FF and #EA79A3 (relative luminance 0.253 and 0.338).
    Retro Computer TV. Own work.
  • Steel Ranger (the 2018 free demo) being played on a Commodore 64, 6.7 s: inside the patrol ship, the ranger walks right along a corridor past a crew member while the view scrolls (0.16-0.90 s), the screen blanks for six frames as the game switches to the next area (2.55-2.65 s), then the ranger goes down a stairwell and the view scrolls down and across with him (3.25-6.66 s). Throughout, the status panel at the bottom (energy bar, parts and score counters 000 0000000) stays fixed and unchanged under the scrolling play area. Black surroundings; no title screen, logo, loading picture or dialogue text in this stretch; no sound.
    Steel Ranger (demo) (Lasse Öörni / Psytronik Software, 2018). Fair dealing (criticism, review, quotation): Steel Ranger (demo) (Lasse Öörni / Psytronik Software, 2018); recorded by Retro Computer TV.
  • The legible version of emu-c64-sys-return, the same frames cropped to the typed lines and the output: READY., the three lines, RUN, BEFORE, ABC, AFTER, READY.
    Commodore 64 BASIC V2 and KERNAL (Commodore Business Machines, 1982). Fair dealing (criticism, review, quotation): Commodore 64 BASIC V2 and KERNAL (Commodore Business Machines, 1982); recorded by Retro Computer TV.
  • The same decimal-mode test program on a Commodore 64 (6510, NMOS) and an NES (Ricoh 2A03), side by side: 19 + 28 = 47 against 41, 99 + 01 = 00 CARRY 1 against 9A CARRY 0
    Retro Computer TV. Own work.
  • MAME's drawing of the KIM-1's six red 7-segment digits above the top row of its keypad (GO, ST, RS, SST), on black: the display reads 0200 00; A9 is entered (0200 A9 at 1.72 s), then + and 42 (0201 42 at 2.68 s); AD 0 2 0 0 (0200 A9 at 4.58 s); the SST key darkens, switched on (5.42 s); GO darkens briefly four times and the display steps 0202 AA (6.42 s), 0203 E8 (7.62 s), 0204 4C (8.82 s), 0200 A9 (10.02 s); then AD 0 0 F 3 and the display reads 00F3 42 (12.80 s), held to 15.0 s. For a frame or two after each key the changing digits blend (as MAME draws a display mid-scan). 1920 x 1080, 50 fps, silent.
    Retro Computer TV. Own work.
  • Wizard of Wor (the MAX Machine cartridge, Commodore 1982, v.02) being played, 15 s: the blue Worrior in the cyan maze shooting Burwors, Garwors and Thorwors; the SCORE at the bottom counts 000300, 000600, 000800, 001000; HI-SCORE 000000; PLAYER (lives left) 1, then 0. Blue border, the whole 4:3 frame.
    Wizard of Wor (Dave Nutting Associates and Midway, 1981; the MAX Machine version Commodore Electronics Ltd., 1982; Midway's rights now Warner Bros. Games). Fair dealing (criticism, review, quotation): Wizard of Wor (Dave Nutting Associates and Midway, 1981; the MAX Machine version Commodore Electronics Ltd., 1982; Midway's rights now Warner Bros. Games); recorded by Retro Computer TV.
  • Commodore's Wizard of Wor (MAX cartridge) in play, score 000600
    Wizard of Wor (Dave Nutting Associates and Midway, 1981; the MAX Machine version Commodore Electronics Ltd., 1982; Midway's rights now Warner Bros. Games). Fair dealing (criticism, review, quotation): Wizard of Wor (Dave Nutting Associates and Midway, 1981; the MAX Machine version Commodore Electronics Ltd., 1982; Midway's rights now Warner Bros. Games); recorded by Retro Computer TV.
  • Page 35 of MOS Technology's MCS6500 Microcomputer Family Hardware Manual, January 1976 (PDF page 48, a landscape page): FIGURE 1.13 'MCS650X System Timing Diagram': Vss, phi2, RESET, READY, R/W, address bus, data bus, DBE, BA (MCS6501 only), SYNC (MCS6502 only) and NMI through the start-up sequence and normal activity.
    MOS Technology, MCS6500 Microcomputer Family Hardware Manual, January 1976. unknown. Source
  • A MOS Technology KIM-1 single-board computer flat from above on black, at the Musee Bolo, EPFL Lausanne: the CPU is a white ceramic MCS 6502 with a gold lid, date code 3876 (week 38 of 1976); below it a ceramic MCS 6530-003 (1676) and a plastic MPS 6530-002 dated 0580 (1980, a later replacement); the 6102 RAMs, the LED display and the 24-key keypad; board legend KIM-1 with the MOS logo and a handwritten owner's sticker.
    Photo: Rama and Musee Bolo, CC BY-SA 2.0 FR, via Wikimedia Commons. CC BY-SA 2.0 fr. Source
  • Bill Mensch, who laid out much of the 6502's circuitry at MOS Technology (later founder of the Western Design Center), bald with a white beard, in a black WDC polo shirt, in front of a display case of Commodore machines and boxes, March 2014. A 2014 photograph: never captioned as the 1970s.
    Photo: Jason Scott, CC BY 2.0, via Wikimedia Commons. CC BY 2.0. Source
  • The MOnSter 6502, Eric Schlaepfer and Evil Mad Scientist's transistor-scale discrete replica of the 6502 (a large board in a wooden frame, LEDs lit), on show at Maker Faire New York, 24 September 2017, with an Editor's Choice ribbon hanging on it; at the left edge part of a printed die poster labelled 'Original 6502 IC Die' (likely Visual6502's photo: crop it out).
    MOnSter 6502: Lenore Edman, CC BY 2.0, via Wikimedia Commons. CC BY 2.0. Source
  • A Motorola 6800 demonstration board on display at the Computer History Museum, photographed by Michael Holley: a 'UNIVERSAL DIP BOARD' (MP-72BD041) with six ceramic chips in sockets, hand-labelled 'RAM XC 6810' (top left), two gold-lid XCM6810 RAMs (top), a white XC6820 (left), 'MPU XC 6800' in a red socket (centre) and 'PIA XC 6820' (right), white wires at the edges. Below it the museum's card: '6800 Microprocessor, Motorola, Inc., US, 1974. The general-purpose 6800 microprocessor came with a family of compatible peripheral chips that enabled widespread use in computing, communications, and industrial systems. Gift of Thomas H. Bennett, 102711296.' A lamp stand crosses the right of the frame and shadows the card. 3,241 x 2,161.
    Photo: Michael Holley (Swtpc6800), public domain, via Wikimedia Commons. Source
  • An NES main board, NES-CPU-07, (c)1987 Nintendo, with an NTSC sticker, flat on white (Evan-Amos, 2015): the CPU (U3, 'CPU') is a Ricoh RP2A03G marked 8A2 B7; the PPU a Ricoh RP2C02G-0 (7M3 52); two Fujitsu MB8416A-15-SK SRAMs (8804); the 72-pin cartridge connector; the RF module at the bottom right.
    Photo: Evan-Amos, public domain, via Wikimedia Commons. Source
  • A front-loading Nintendo Entertainment System with a controller attached, on white.
    Photo: Evan-Amos, public domain, via Wikimedia Commons. Source
  • The Preface of groepaz's 'No More Secrets' V1.0, PDF page 6 (printed '- I -'): "'Back in the days' so called 'illegal' opcodes were researched independently by different parties, and detail knowledge about them was considered 'black magic' for many conventional programmers. They first appeared in the context of copy protection schemes, so keeping the knowledge secret was crucial.", then the paragraphs on Wolfgang Lorenz's test suite and the de-capped CPU, signed '24/12/25 groepaz/solution', and the sections 'Scope of this Document' and 'Intended Audience'. Black text on white, 1,786 x 2,526.
    No More Secrets V1.0, groepaz/solution (2025), via CSDb. Fair-use candidate (No More Secrets V1.0, groepaz, 24 December 2025; no licence stated). Source
  • The top of John McMaster's 6502D sample before decapping: a black plastic 40-pin DIP on a wooden surface, marked MOS / MPS 6502 A / 5281 (MOS week-year: week 52 of 1981; 'A' is the 2 MHz speed grade, not a revision), a hand-painted white '2' at the pin-1 end. The same chip as die-6502d-mcmaster.
    MOS 6502D package: John McMaster, CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • A MOS Technology MCS6502 in a white ceramic 40-pin package with a gold lid marked with the MOS logo, MCS 6502 and date code 4575 (week 45 of 1975), photographed at an angle on an orange-yellow gradient. 640 x 401 px.
    Photo: Christian Bassow, CC BY-SA 4.0, via Wikimedia Commons. CC BY-SA 4.0. Source
  • A MOS Technology MPS6502B in a black plastic 40-pin DIP flat on white: MOS / MPS6502B / 3980 (week 39 of 1980; 'B' is the 3 MHz grade). 2,182 x 812 px.
    Photo: ZyMOS, CC BY-SA 4.0, via Wikimedia Commons. CC BY-SA 4.0. Source
  • The top of the RP2A03 sample: a weathered black plastic 40-pin DIP marked RP2A03 4B220 (Ricoh lot code; no revision letter after 03 is legible), on a grey surface.
    Ricoh RP2A03 package: John McMaster and Digshadow, CC BY 4.0, via Wikimedia Commons. CC BY 4.0. Source
  • A Western Design Center W65C02S microprocessor in a black plastic 40-pin DIP, flat on white, marked with the WDC logo, W65C02SP-6 and SA9320A. Dirk Oppelt's photograph (cpu-collection.de).
    Photo: Dirk Oppelt (cpu-collection.de), CC BY-SA 3.0, via Wikimedia Commons. CC BY-SA 3.0. Source
  • US Patent 3,991,307, Sheet 1 of 3, FIG. 1: block diagram of the decimal adder: binary operands A and B (low and high 4 bits) into parallel binary adders, decimal correction gating on each half and decimal carry gating, into the accumulator low and high 4 bits.
    US Patent 3,991,307 (USPTO; Google Patents). unknown. Source
  • Front page of US Patent 3,991,307 (Peddle et al., Nov. 9, 1976): title 'Integrated circuit microprocessor with parallel binary adder having on-the-fly correction to provide decimal results', inventors Charles Ingerham Peddle, Wilbur L. Mathys, William D. Mensch Jr. and Rodney H. Orgill, assignee MOS Technology, Inc., Norristown, Pa., filed Sept. 16, 1975; the abstract and the block drawing.
    US Patent 3,991,307 (USPTO; Google Patents). unknown. Source
  • Chuck Peddle, who led the 6502's design team at MOS Technology, aged about 76: white hair and beard, dark top, seated and smiling in a room with a staircase rail behind him, 17 October 2013. A 2013 photograph: never captioned as the 1970s.
    Photo: Jason Scott, CC BY 2.0, via Wikimedia Commons. CC BY 2.0. Source
  • MOS's January 1976 programming manual, printed p. 107: the JSR cycle table (Example 8.3) and 'This apparent anomaly in the machine is corrected during the Return from Subroutine instruction'
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • MOS's January 1976 programming manual, printed p. 110, RTS: the pull's extra cycle ('This is done to shorten the interrupt sequence') and 'That is the only purpose of the sixth cycle'
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • MOS's January 1976 programming manual, section 9.2 Start Function: at reset the internal registers in 'any random condition'
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • MOS's January 1976 programming manual, section 9.2: the start sequence 'a specialized form of interrupt'
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • MOS's January 1976 programming manual, section 9.2 Start Function: at reset the internal registers in 'any random condition'
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • MOS's January 1976 programming manual, printed p. 141, 9.8.1 JMP Indirect and Example 9.6: cycle 4 'Add 1 to IAL', cycle 5 fetches ADH from IAH, IAL+1
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • MOS's January 1976 programming manual, printed p. 52, section 5.1 Concepts of Pipelining and Program Sequence: 'every clock cycle in the MCS650X microprocessor is a memory cycle in which memory is either read or written'
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • MOS's January 1976 programming manual, printed p. 58, implied addressing: 'since the OP CODE totally defines the operation, the second memory fetch is worthless', with Example 5.3, the 2-cycle instruction's three cycles
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source
  • Page 150 of MOS Technology's MCS6500 Microcomputer Family Programming Manual, January 1976 (PDF page 167): section '10.4 ROR - ROTATE RIGHT (Available on Microprocessors after June, 1976)', its description and symbolic diagram (C to B7 ... B0), and section 10.5 Accumulator Mode Addressing with the cycle table of Example 10.2 'Rotate accumulator left' (cycles, address bus, data bus, external and internal operation).
    MOS Technology, MCS6500 Microcomputer Family Programming Manual, January 1976. unknown. Source

Music (34)

Sources (109)